Analysis of multiple-bus interconnection networks
Journal of Parallel and Distributed Computing
Trace-driven memory simulation: a survey
ACM Computing Surveys (CSUR)
MINT: A Front End for Efficient Simulation of Shared-Memory Multiprocessors
MASCOTS '94 Proceedings of the Second International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems
Model-Based Performance Prediction in Software Development: A Survey
IEEE Transactions on Software Engineering
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
Performance evaluation of UML software architectures with multiclass Queueing Network models
Proceedings of the 5th international workshop on Software and performance
Hardware debugging method based on signal transitions and transactions
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Integrating Software Models and Platform Models for Performance Analysis
IEEE Transactions on Software Engineering
Validity of the single processor approach to achieving large scale computing capabilities
AFIPS '67 (Spring) Proceedings of the April 18-20, 1967, spring joint computer conference
A modeling method by eliminating execution traces for performance evaluation
Proceedings of the Conference on Design, Automation and Test in Europe
A co-design approach for embedded system modeling and code generation with UML and MARTE
Proceedings of the Conference on Design, Automation and Test in Europe
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We propose a coarse-grained simulation method which takes the effect of memory access contention into account. The method can be used for the evaluation of the execution time of an application program during the system architecture design in an early phase of development. In this phase, information about memory access timings is usually not available. Our method uses a statistical approximation of the memory access timings to estimate their influences on the execution time. We report a preliminary verification of our simulation method by comparing it with an experimental result from an image processing application on a dual-core PC. We find an error of the order of 3 percents on the execution time.