A low-power design method using multiple supply voltages
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Optimal Scheduling Algorithm for Distributed-Memory Machines
IEEE Transactions on Parallel and Distributed Systems
A survey of design techniques for system-level dynamic power management
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low-power electronics and design
Dynamic voltage scaling on a low-power microprocessor
Proceedings of the 7th annual international conference on Mobile computing and networking
Energy aware task scheduling with task synchronization for embedded real time systems
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
ECOSystem: managing energy as a first class operating system resource
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Energy-Aware Runtime Scheduling for Embedded-Multiprocessor SOCs
IEEE Design & Test
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
RTSS '98 Proceedings of the IEEE Real-Time Systems Symposium
A Task Duplication Based Scheduling Algorithm for Heterogeneous Systems
IPDPS '00 Proceedings of the 14th International Symposium on Parallel and Distributed Processing
Power-Aware Scheduling for Periodic Real-Time Tasks
IEEE Transactions on Computers
PACE: A New Approach to Dynamic Voltage Scaling
IEEE Transactions on Computers
Topology selection for energy minimization in embedded networks
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Scheduling for reduced CPU energy
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
Energy-Efficient Real-Time Task Scheduling in Multiprocessor DVS Systems
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Overview of the Blue Gene/L system architecture
IBM Journal of Research and Development
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By dynamically adjusting CPU speed and voltage with DVS technique, it is possible to save significant amounts of energy with no or little performance loss. There are numerous algorithms published with this goal, most of which concern the power-aware management in real-time system, embedded system, wireless sensor work etc. In this paper, we present a heuristic algorithm, applying the DVS technique in distributed system, where we place high importance on communication time between processors. At the same time, we concentrate on a large number of tasks. In this situation, we could divide a dependent task into many subtasks, which could be concurrently executed on processors in distributed system. After a shortest deadline has been made, our power-aware scheduling algorithm will reduce the energy consumption without affecting its performance. The experimental results show that our algorithm can reduce the CPU energy consumption by up to 40 percents, or even more, with an average of nearly 36 percents.