Arbitrary rotation of raster images with SIMD machine architectures
Computer Graphics Forum
Realizing Fault-Tolerant Interconnection Networks Via Chaining
IEEE Transactions on Computers - Fault-Tolerant Computing
The Hough transform on a reconfigurable multi-ring network
Journal of Parallel and Distributed Computing
IEEE/ACM Transactions on Networking (TON)
SPDP '95 Proceedings of the 7th IEEE Symposium on Parallel and Distributeed Processing
Fault tolerance and performance improvement in multiprocessor interconnection networks (shuffle-exchange, redundant-path array processors)
HPCA '05 Proceedings of the 11th International Symposium on High-Performance Computer Architecture
Siamese-Twin: A Dynamically Fault-Tolerant Fat-Tree
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
Journal of Parallel and Distributed Computing
Combining Source Routing and Dynamic Fault Tolerance
SBAC-PAD '06 Proceedings of the 18th International Symposium on Computer Architecture and High Performance Computing
Towards an efficient switch architecture for high-radix switches
Proceedings of the 2006 ACM/IEEE symposium on Architecture for networking and communications systems
Adaptive routing in high-radix clos network
Proceedings of the 2006 ACM/IEEE conference on Supercomputing
Flattened butterfly: a cost-efficient topology for high-radix networks
Proceedings of the 34th annual international symposium on Computer architecture
On a Class of Multistage Interconnection Networks
IEEE Transactions on Computers
High-radix crossbar switches enabled by proximity communication
Proceedings of the 2008 ACM/IEEE conference on Supercomputing
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High-radix multistage interconnection networks are popular interconnection technologies for parallel supercomputers and cluster computers. In this paper, we presented a new dynamically fault-tolerant high-radix multistage interconnection network using a fully-adaptive self-routing. To devise the fully-adaptive self-routing for recovering the misrouting around link faults in such network, we introduce an abstract algebraic analysis of the topological structure of the high-radix Delta network. The presented interconnection network provides multiple paths by using all the links of all the stages of the network. We also present a mathematical analysis of the reliability of the interconnection network for quantitative comparison against other networks. The MTTF of 64脳64 network proposed is 2.2 times greater than that of the cyclic Banyan network. The hardware cost of the proposed network is half that of the cyclic Banyan network and the 2D ring-Banyan network.