Compiler-directed scratch pad memory optimization for embedded multiprocessors

Authors:
Mahmut Kandemir;Ismail Kadayif;Alok Choudhary;J. Ramanujam;Ibrahim Kolcu
Affiliations:
The Pennsylvania State University, University Park, PA;The Pennsylvania State University, University Park, PA;Northwestern University, Evanston, IL;Louisiana State University, Baton Rouge, LA;University of Manchester Institute of Science and Technology, Manchester, UK
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2002 international symposium on low-power electronics and design (ISLPED)
Year:
2004

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Abstract

This paper presents a compiler strategy to optimize data accesses in regular array-intensive applications running on embedded multiprocessor environments. Specifically, we propose an optimization algorithm that targets at reducing extra off-chip memory accesses caused by interprocessor communication. This is achieved by increasing the application-wide reuse of data that resides in scratch-pad memories of processors. Our results obtained using four array-intensive image processing applications indicate that exploiting interprocessor data sharing can reduce energy-delay product significantly on a four-processor embedded system.