Proceedings of the 43rd annual Design Automation Conference
Width-dependent statistical leakage modeling for random dopant induced threshold voltage shift
Proceedings of the 44th annual Design Automation Conference
Proceedings of the 2009 International Conference on Computer-Aided Design
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
The Dawn of Predictive Chip Yield Design: Along and Beyond the Memory Lane
IEEE Design & Test
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Device mismatch and process variation models play a key role in determining the functionality and yield of sub-100nm design. Average characteristics are often of interest, such as the average leakage current or the average read delay. However, detecting rare functional fails is critical for memory design and designers often seek techniques that enable accurately modeling such events. Extremely leaky devices can inflict functionality fails. The plurality of leaky devices on a bitline increase the dimensionality of the yield estimation problem. Simplified models are possible by adopting approximations to the underlying sum of lognormals. The implications of such approximations on tail probabilities may in turn bias the yield estimate. We review different closed form approximations and compare against the CDF matching method, which is shown to be most effective method for accurate statistical leakage modeling.