Fundamentals of modern VLSI devices
Fundamentals of modern VLSI devices
Parameter variations and impact on circuits and microarchitecture
Proceedings of the 40th annual Design Automation Conference
Full-chip analysis of leakage power under process variations, including spatial correlations
Proceedings of the 42nd annual Design Automation Conference
Semiconductor Material and Device Characterization
Semiconductor Material and Device Characterization
Proceedings of the 45th annual Design Automation Conference
Full-chip leakage analysis for 65nm CMOS technology and beyond
Integration, the VLSI Journal
Understanding the effect of process variations on the delay of static and domino logic
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The impact of statistical leakage models on design yield estimation
VLSI Design - Special issue on CAD for Gigascale SoC Design and Verification Solutions
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Statistical behavior of device leakage and threshold voltage shows a strong width dependency under microscopic random dopant fluctuation. Leakage estimation using the conventional square-root method shows a discrepancy as large as 45% compared to the real case because it fails to model the effective VT shift in the subthreshold region. This paper presents a width-dependent statistical leakage model with an estimation error less than 5%. Design examples on SRAMs and domino circuits demonstrate the significance of the proposed model.