Fundamentals of modern VLSI devices
Fundamentals of modern VLSI devices
Full-chip analysis of leakage power under process variations, including spatial correlations
Proceedings of the 42nd annual Design Automation Conference
Proceedings of the 42nd annual Design Automation Conference
Asymptotic probability extraction for non-normal distributions of circuit performance
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Projection-based performance modeling for inter/intra-die variations
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Projection-based statistical analysis of full-chip leakage power with non-log-normal distributions
Proceedings of the 43rd annual Design Automation Conference
Proceedings of the 43rd annual Design Automation Conference
Width-dependent statistical leakage modeling for random dopant induced threshold voltage shift
Proceedings of the 44th annual Design Automation Conference
Modeling and estimation of full-chip leakage current considering within-die correlation
Proceedings of the 44th annual Design Automation Conference
Statistical analysis of full-chip leakage power considering junction tunneling leakage
Proceedings of the 44th annual Design Automation Conference
Characterizing process variation in nanometer CMOS
Proceedings of the 44th annual Design Automation Conference
Modeling and analysis of non-rectangular gate for post-lithography circuit simulation
Proceedings of the 44th annual Design Automation Conference
IEEE Spectrum
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Variation-aware supply voltage assignment for minimizing circuit degradation and leakage
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Proceedings of the 46th Annual Design Automation Conference
Proceedings of the 2009 International Conference on Computer-Aided Design
Layout-dependent STI stress analysis and stress-aware RF/analog circuit design optimization
Proceedings of the 2009 International Conference on Computer-Aided Design
Proceedings of the 47th Design Automation Conference
Full-chip leakage analysis for 65nm CMOS technology and beyond
Integration, the VLSI Journal
Dynamic power estimation for deep submicron circuits with process variation
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
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In this paper, a methodology for full-chip leakage analysis based on accurate modeling of different leakage currents in nano-scaled MOSFETs has been developed. Novel process effects have been covered in our statistical model, and a systematic characterization method of leakage-related parameter variations has been proposed. With these two contributions, we present an effective algorithm to address the growing issue of full-chip leakage verification for actual-fabrication circuits. Unlike many traditional approaches that rely on log-Normal approximations, the proposed algorithm applies a quadratic model of the logarithm for the full-chip leakage current and is able to include both Gaussian and Non-Gaussian parameter distributions. Our simulation examples in a 65nm CMOS process demonstrate that the proposed methodology provides more accurate results compared with the previous methods, while achieving orders of magnitude more efficiency than a Monte Carlo analysis.