Statistical analysis of subthreshold leakage current for VLSI circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Full-chip analysis of leakage power under process variations, including spatial correlations
Proceedings of the 42nd annual Design Automation Conference
New Generation of Predictive Technology Model for Sub-45nm Design Exploration
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Projection-based statistical analysis of full-chip leakage power with non-log-normal distributions
Proceedings of the 43rd annual Design Automation Conference
Proceedings of the 45th annual Design Automation Conference
Proceedings of the 2009 International Conference on Computer-Aided Design
A precorrected-FFT method for electrostatic analysis of complicated 3-D structures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.00 |
Existing approaches to statistical leakage analysis focus only on calculating the mean and variance of the total leakage. In practice, however, what concerns most is the tail behavior of the sum distribution, as it tells that to what extent the design will be safe or reliable. However, computing the tail distribution is much more difficult than computing the mean and variance. In this paper, we tackle this problem by making use of the recent developments in the area of financial and insurance analysis, as well as the fast evaluation algorithm for the variance of spatially correlated random sums. The proposed algorithm is provably of O(N) complexity. Experiments show that the algorithm provides 1% accuracy in modeling the tail behavior and it is 10X more accurate compared with existing methods that approximate the distribution by matching the moments of a lognormal distribution.