Timed shared circuits: a power-efficient design style and synthesis tool
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Multi-Output Timed Shannon Circuits
ISVLSI '02 Proceedings of the IEEE Computer Society Annual Symposium on VLSI
A novel synthesis approach for active leakage power reduction using dynamic supply gating
Proceedings of the 42nd annual Design Automation Conference
On Projecting Sums of Products
DSD '08 Proceedings of the 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools
The complexity of modular decomposition of Boolean functions
Discrete Applied Mathematics - Special issue: Boolean and pseudo-boolean funtions
On decomposing Boolean functions via extended cofactoring
Proceedings of the Conference on Design, Automation and Test in Europe
Synthesis of P-circuits for logic restructuring
Integration, the VLSI Journal
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Boolean functional decomposition techniques built on top of Shannon cofactoring have been discussed in various applications of logic synthesis targeting reductions in area, delay and power. In this paper we investigate a generalization of decomposition based on Shannon cofactoring by means of non-orthonormal projection functions. We provide an approximation algorithm, by showing a constant approximation ratio between its result and the best solution. Experimental results in logic restructuring to reduce area and switching power show significant gains with respect to standard Shannon cofactoring, for even shorter computation time.