HLS tools for FPGA: faster development with better performance

Authors:
Alexandre Cornu;Steven Derrien;Dominique Lavenier
Affiliations:
IRISA, Rennes, France and INRIA, Rennes, France;INRIA, Rennes, France and Université de Rennes 1, Rennes, France;IRISA, Rennes, France, CNRS and ENS Cachan Bretagne
Venue:
ARC'11 Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications
Year:
2011

Citing 7
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Abstract

Designing FPGA-based accelerators is a difficult and time-consuming task which can be softened by the emergence of new generations of High Level Synthesis Tools. This paper describes how the ImpulseC C-to-hardware compiler tool has been used to develop efficient hardware for a known genomic sequence alignment algorithms and reports HLL designs performance outperforming traditional hand written optimized HDL implementations.