Formal verification of pipeline conflicts in RISC processors
EURO-DAC '94 Proceedings of the conference on European design automation
A Practical Methodology for the Formal Verification of RISC Processors
Formal Methods in System Design
Formal verification in hardware design: a survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Proving Properties of Multidimensional Recurrences with Application to Regular Parallel Algorithms
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
ASIAN '00 Proceedings of the 6th Asian Computing Science Conference on Advances in Computing Science
Hierarchical Verification Using an MDG-HOL Hybrid Tool
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Mechanization Of Real-Time Linear Csp With Higher Order Logic
Fundamenta Informaticae
| Hi-index | 0.00 |