The art of computer programming, volume 3: (2nd ed.) sorting and searching
The art of computer programming, volume 3: (2nd ed.) sorting and searching
A high-speed sorting procedure
Communications of the ACM
A Comparison of Parallel Sorting Algorithms on Different Architectures
A Comparison of Parallel Sorting Algorithms on Different Architectures
An FPGA Parallel Sorting Architecture for the Burrows Wheeler Transform
RECONFIG '05 Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) on Reconfigurable Computing and FPGAs
Sorting networks and their applications
AFIPS '68 (Spring) Proceedings of the April 30--May 2, 1968, spring joint computer conference
Parallel Architecture for the Solution of Linear Equation Systems Implemented in FPGA
CERMA '09 Proceedings of the 2009 Electronics, Robotics and Automotive Mechanics Conference (cerma 2009)
Proceedings of the VLDB Endowment
On the complexity of min-max sorting networks
Information Sciences: an International Journal
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Speed and efficiency of sorting algorithms are essential for high speed data processing. FPGA based hardware accelerators show better performance than the general purpose processors. Similarly traditional algorithms may not be always efficient on FPGAs. Sorting networks have come as suitable alternatives which can be implemented on FPGAs efficiently. Each application has its own constraint on latency and throughput. A careful selection of a sorting network with suitable number of pipeline stages performs at higher throughput, without contributing much latency.