Practical and secure PCM systems by online detection of malicious write streams

  • Authors:
  • Moinuddin K. Qureshi;Andre Seznec;Luis A. Lastras;Michele M. Franceschini

  • Affiliations:
  • IBM T. J. Watson Research Center, Yorktown Heights, NY;IRISA/INRIA, France;IBM T. J. Watson Research Center, Yorktown Heights, NY;IBM T. J. Watson Research Center, Yorktown Heights, NY

  • Venue:
  • HPCA '11 Proceedings of the 2011 IEEE 17th International Symposium on High Performance Computer Architecture
  • Year:
  • 2011

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Abstract

Phase Change Memory (PCM) may become a viable alternative for the design of main memory systems in the next few years. However PCM suffers from limited write endurance. Therefore future adoption of PCM as a technology for main memory will depend on the availability of practical solutions for wear leveling that avoids uneven usage especially in the presence of potentially malicious users. First generation wear leveling algorithms were designed for typical workloads and have significantly reduced lifetime under malicious access patterns that try to write to the same line continuously. Secure wear leveling algorithms were recently proposed. They can handle such malicious attacks, but require that wear leveling is done at a rate that is orders of magnitude higher than what is sufficient for typical applications, thereby incurring significantly high write overhead, potentially impairing overall performance system. This paper proposes a practical wear-leveling framework that can provide years of lifetime under attacks while still incurring negligible (