A low-power referenceless clock and data recovery circuit with clock-edge modulation for biomedical sensor applications

Authors:
Sunkwon Kim;Jong-Kwan Woo;Woo-Yeol Shin;Gi-Moon Hong;Hyongmin Lee;Hyunjoong Lee;Suhwan Kim
Affiliations:
Seoul National University, seoul, South Korea;Seoul National University, seoul, South Korea;Seoul National University, seoul, South Korea;Seoul National University, seoul, South Korea;Seoul National University, seoul, South Korea;Seoul National University, seoul, South Korea;Seoul National University, seoul, South Korea
Venue:
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Year:
2011

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Abstract

This paper proposes a low-power referenceless clock and data recovery (CDR) circuit for biomedical devices or sensor applications. Its power consumption is reduced by adopting clock-edge modulation technique and using a voltage-controlled oscillator (VCO) based on a relaxation oscillator. Clock-edge modulation eliminates the need for an external reference clock without introducing the possibility of harmonic locking. Our CDR supports input data-rates between 200kbps and 10Mbps at 0.7V, and operate up to 24 MHz at 1.0V. The circuit is designed in a 0.18μm CMOS technology and consumes 8μW at an input data-rate of 10Mbps.