Analog VLSI and neural systems
Analog VLSI and neural systems
Analog Integrated Circuits and Signal Processing - Special issue: low-voltage low-power analog integrated circuits
MOS current mode logic for low power, low noise CORDIC computation in mixed-signal environments
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
MOS current mode circuits: analysis design and variability
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Analysis and design of an ultralow-power CMOS relaxation oscillator
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
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This paper presents subthreshold MOS current-mode logic (MCML) circuits implemented in a commercial 0.25-µm CMOS technology. We propose the adoption of bulk-drain-connected pMOS transistors as loads for subthreshold MCML gates. The b-d connection extends the linear operating range of the load, thus increasing the output logic swing of the subthreshold MCML gate. Theoretical and measured results are presented for an MCML inverter and a ten-stage ring oscillator operating at supply voltages below the threshold-voltage value, with power consumption on the order of nanowatts. At a 300-mV supply, the oscillator works at a frequency of 638 Hz with a total power consumption of 345 pW.