A 100-MIPS GaAs Asynchronous Microprocessor

Authors:
José A. Tierno;Alain J. Martin;Drazen Borkovic;Tak Kwan Lee
Affiliations:
-;-;-;-
Venue:
IEEE Design & Test
Year:
1994

Citing 3
Cited 6

The design of an asynchronous microprocessor

Proceedings of the decennial Caltech conference on VLSI on Advanced research in VLSI
Communicating sequential processes

Communications of the ACM
Designing Asynchronous Circuits in Gallium Arsenide

Designing Asynchronous Circuits in Gallium Arsenide

Asynchronous Processor Survey

Computer
Hades-towards the design of an asynchronous superscalar processor

ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
Fred: An Architecture for a Self-Timed Decoupled Computer

ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Architectural Considerations for Application-Specific Counterflow Pipelines

ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
Synchronous Test Generation Model for Asynchronous Circuits

VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
ARM996HS: The First Licensable, Clockless 32-Bit Processor Core

IEEE Micro

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Abstract

The authors describe how they ported an asynchronous microprocessor previously implemented in CMOS to gallium arsenide, using a technology-independent asynchronous design technique. They introduce new circuits including a sense-amplifier, a completion detection circuit, and a general circuit structure for operators specified by production rules. The authors used and tested these circuits in a variety of designs.