Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
Temperature-aware microarchitecture
Proceedings of the 30th annual international symposium on Computer architecture
Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems
ISQED '07 Proceedings of the 8th International Symposium on Quality Electronic Design
Accurate temperature-dependent integrated circuit leakage power estimation is easy
Proceedings of the conference on Design, automation and test in Europe
Approximation algorithm for the temperature-aware scheduling problem
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Temperature aware task sequencing and voltage scaling
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Leakage Aware Feasibility Analysis for Temperature-Constrained Hard Real-Time Periodic Tasks
ECRTS '09 Proceedings of the 2009 21st Euromicro Conference on Real-Time Systems
Online work maximization under a peak temperature constraint
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Thermal aware task sequencing on embedded processors
Proceedings of the 47th Design Automation Conference
Energy-efficient real-time task scheduling with temperature-dependent leakage
Proceedings of the Conference on Design, Automation and Test in Europe
Hybrid of Job Sequencing and DVFS for Peak Temperature Reduction with Nondeterministic Applications
CIT '10 Proceedings of the 2010 10th IEEE International Conference on Computer and Information Technology
Leakage Aware Scheduling on Maximum Temperature Minimization for Periodic Hard Real-Time Systems
CIT '10 Proceedings of the 2010 10th IEEE International Conference on Computer and Information Technology
Temperature and supply Voltage aware performance and power modeling at microarchitecture level
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Enhancing multicore reliability through wear compensation in online assignment and scheduling
Proceedings of the Conference on Design, Automation and Test in Europe
Hi-index | 0.00 |
We study the problem on how to maximize the throughput for a periodic real-time system under the given peak temperature constraint. We assume that different tasks in our system may have different power and thermal characteristics. Two algorithms are presented in this paper. The first one is built upon processors that can be either in active or sleep mode. By judiciously selecting tasks with different thermal characteristics as well as alternating the processor active/sleep mode, our approach can improve the throughput upon the existing techniques by 21% in average. We further extend this approach for processors with dynamic voltage/frequency scaling (DVFS) capability. Our experiments show that an improvement of 24% can be achieved when compared with the existing methods.