Handbook of theoretical computer science (vol. B)
Modalities for model checking (extended abstract): branching time strikes back
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Synchronous Programming of Reactive Systems
Synchronous Programming of Reactive Systems
Programming by sketching for bit-streaming programs
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
Combinatorial sketching for finite programs
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Specify, Compile, Run: Hardware from PSL
Electronic Notes in Theoretical Computer Science (ENTCS)
Size matters: lessons from a broken binary search
Journal of Computing Sciences in Colleges
Programming with angelic nondeterminism
Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Program synthesis by sketching
Program synthesis by sketching
ATVA'07 Proceedings of the 5th international conference on Automated technology for verification and analysis
Compositional algorithms for LTL synthesis
ATVA'10 Proceedings of the 8th international conference on Automated technology for verification and analysis
Verification of Reactive Systems: Formal Methods and Algorithms
Verification of Reactive Systems: Formal Methods and Algorithms
Temporal logic for process specification and recognition
Intelligent Service Robotics
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Sketching is an approach to automated software synthesis where the programmer develops a partial implementation called a sketch and a separate specification of the desired functionality. A synthesizer tool then automatically completes the sketch to a complete program that satisfies the specification. Previously, sketching has been applied to finite programs with a desired functional input/output behavior and given invariants. In this paper, we consider (non-terminating) reactive programs and use the full branching time logic CTL* to formalize specifications. We show that the sketching problem can be reduced to a CTL* model checking problem provided there is a translation of the program to labeled transition systems.