The input/output complexity of sorting and related problems
Communications of the ACM
Minimum-perimeter domain assignment
Mathematical Programming: Series A and B
On the diameter of the pancake network
Journal of Algorithms
Models of Computation: Exploring the Power of Computing
Models of Computation: Exploring the Power of Computing
Extending the Hong-Kung Model to Memory Hierarchies
COCOON '95 Proceedings of the First Annual International Conference on Computing and Combinatorics
I/O complexity: The red-blue pebble game
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
A complexity theory for VLSI
Computer Architecture, Fourth Edition: A Quantitative Approach
Computer Architecture, Fourth Edition: A Quantitative Approach
A lower bound for matrix multiplication
SFCS '88 Proceedings of the 29th Annual Symposium on Foundations of Computer Science
Cache-optimal algorithms for option pricing
ACM Transactions on Mathematical Software (TOMS)
Theory and application of width bounded geometric separators
Journal of Computer and System Sciences
Upper and lower I/O bounds for pebbling r-pyramids
IWOCA'10 Proceedings of the 21st international conference on Combinatorial algorithms
Strong I/O lower bounds for binomial and FFT computation graphs
COCOON'11 Proceedings of the 17th annual international conference on Computing and combinatorics
Strong I/O lower bounds for binomial and FFT computation graphs
COCOON'11 Proceedings of the 17th annual international conference on Computing and combinatorics
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Processors on most of the modern computing devices have several levels of memory hierarchy. To obtain good performance on these processors it is necessary to design algorithms that minimize I/O traffic to slower memories in the hierarchy. In this paper, we propose a new technique, the boundary flow technique, for deriving lower bounds on the memory traffic complexity of problems in a two-level memory hierarchy architectures. The boundary flow technique relies on identifying sub-computation structure corresponding to equal computations with a minimum number of boundary vertices, which in turn is related to the vertex isoperimetric parameter of a computation graph. We demonstrate that this technique results in stronger lower bounds for memory traffic on memory hierarchy architectures for well-known computation structures: the binomial computation graphs and FFT computation graphs.