On the Implementation of a Quasi-Generic Synchronization Architecture for Linear Digital Modulations

  • Authors:
  • Jorge Alberto Surís;Adolfo Recio;Peter M. Athanas

  • Affiliations:
  • Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, USA 24061;Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, USA 24061;Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, USA 24061

  • Venue:
  • Journal of Signal Processing Systems
  • Year:
  • 2011

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Abstract

With increasing availability of software-defined radio platforms, users are no longer tied to receiving or transmitting only one type of signal. In applications, such as signal intelligence, the user may not know ahead of time the characteristics of the signal to be received. This uncertainty results in a need for more flexible receiver architectures that can be easily modified to work for multiple signal types. In this paper the FPGA implementation of a quasi-generic synchronization architecture is presented that is easily adaptable, at implementation time, to most linear modulation schemes. The implementation is shown to work for QPSK, 8QAM, 16QAM and 32QAM with timing frequency errors of up to 4% of the symbol rate.