Graphical models for machine learning and digital communication
Graphical models for machine learning and digital communication
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
FPGA Implementation of Carrier Synchronization for QAM Receivers
Journal of VLSI Signal Processing Systems
A programmable carrier phase independent symbol timing recovery circuit for QPSK/OQPSK signals
Microprocessors & Microsystems
The CORDIC computing technique
IRE-AIEE-ACM '59 (Western) Papers presented at the the March 3-5, 1959, western joint computer conference
Configurable symbol synchronizers for software-defined radio applications
Journal of Network and Computer Applications
Blind signal parameter estimation for the rapid radio framework
MILCOM'09 Proceedings of the 28th IEEE conference on Military communications
The software radio architecture
IEEE Communications Magazine
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With increasing availability of software-defined radio platforms, users are no longer tied to receiving or transmitting only one type of signal. In applications, such as signal intelligence, the user may not know ahead of time the characteristics of the signal to be received. This uncertainty results in a need for more flexible receiver architectures that can be easily modified to work for multiple signal types. In this paper the FPGA implementation of a quasi-generic synchronization architecture is presented that is easily adaptable, at implementation time, to most linear modulation schemes. The implementation is shown to work for QPSK, 8QAM, 16QAM and 32QAM with timing frequency errors of up to 4% of the symbol rate.