Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications
PATMOS '00 Proceedings of the 10th International Workshop on Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation
A VLSI architecture for 3-D self-organizing map based color quantization and its FPGA implementation
Journal of Systems Architecture: the EUROMICRO Journal
A novel Kohonen SOM-based image compression architecture suitable for moderate density FPGAs
Image and Vision Computing
A novel hardware-oriented Kohonen SOM image compression algorithm and its FPGA implementation
Journal of Systems Architecture: the EUROMICRO Journal
Novel fast color reduction algorithm for time-constrained applications
Journal of Visual Communication and Image Representation
Graphics hardware implementation of the parameter-less self-organising map
IDEAL'05 Proceedings of the 6th international conference on Intelligent Data Engineering and Automated Learning
Color image compression and limited display using self-organization Kohonen map
IEEE Transactions on Circuits and Systems for Video Technology
| Hi-index | 0.00 |
The Kohonen Self-Organizing Map (K-SOM) has found applicability in a wide range of application areas. It has also proved to be successfully used in compressing digital images. The dominant point of the algorithm is that it is more suitable to realise in hardware platforms in order to speed up the overall operation. It, however, comes in exchange with the drawback of poorer resulting image quality compared to software implementation. This comes from the fact that both a codebook and a learning kernel within the hardware platform need to be approximated by an integer basis in order to limit the hardware utilization and speed up the execution time. In addition, the learning kernel which has a substantial impact on the quantized image quality is required to be a simple linear integer-based function. In this paper, we propose a hardware centric K-SOM quantizer algorithm which relies on a rational-based representation of the codebook and learning kernel. This extends the capability of the quantizer to accept an approximated non-linear learning kernel. The experimental results have proved that the quality of the outcome images is superior to predecessor implementations with an acceptable throughput and FPGA resource utilizations. The results show that the image quality, measured by the mean square error (MSE), has an average improvement ratio of 0.68 compared to the state-of-the-art integer representation K-SOM quantizer with respect to the standard test images while the proposed quantizer takes only 9% more of the FPGA resources.