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The delay-insensitive minterm synthesis (DIMS) method facilitates a robust two-level asynchronous implementation of dual-rail encoded arbitrary combinational logic. However for multilevel realization, logic decomposition becomes indispensable. In this context, this paper describes an elegant technique of performing quasi-delay-insensitive logic decomposition based on set theoretic principles. This includes consideration of generic homogeneous and heterogeneous delay-insensitive data encoding schemes within the purview of the DIMS approach. Through the proposed set theory based logic decomposition rules, it is shown how any combinational logic specification that comprises any number of concurrent inputs can be synthesized in a multilevel fashion on the basis of the DIMS method without compromising on circuit robustness.