Concurrent rewriting semantics and analysis of asynchronous digital circuits
WRLA'10 Proceedings of the 8th international conference on Rewriting logic and its applications
Variation-immune quasi delay-insensitive implementation on nano-crossbar arrays
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
QDI decomposed DIMS method featuring homogeneous/heterogeneous data encoding
ICANCM'11/ICDCC'11 Proceedings of the 2011 international conference on applied, numerical and computational mathematics, and Proceedings of the 2011 international conference on Computers, digital communications and computing
A robust asynchronous early output full adder
WSEAS Transactions on Circuits and Systems
Design and Analysis of a Robust Carbon Nanotube-Based Asynchronous Primitive Circuit
ACM Journal on Emerging Technologies in Computing Systems (JETC)
ILP formulations for variation/defect-tolerant logic mapping on crossbar nano-architectures
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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This paper is a preliminary investigation in implementing asynchronous QDI logic in molecular nano-electronics, taking into account the restricted geometry, the lack of control on transistor strengths, the high timing variations. We show that the main building blocks of QDI logic can be successfully implemented; we illustrate the approach with the layout of an adder stage. The proposed techniques to improve the reliability of QDI apply to nano-CMOS as well.