Multifacetted modelling and discrete event simulation
Multifacetted modelling and discrete event simulation
Theoretical Computer Science
Event-clock automata: a determinizable class of timed automata
Theoretical Computer Science
GDEVS: A generalized discrete event specification for accurate modeling of dynamic systems
Transactions of the Society for Computer Simulation International
Switching and Finite Automata Theory: Computer Science Series
Switching and Finite Automata Theory: Computer Science Series
Theory of Modeling and Simulation
Theory of Modeling and Simulation
Dynamical Properties of Timed Automata
Discrete Event Dynamic Systems
Time-Constrained Automata (Extended Abstract)
CONCUR '91 Proceedings of the 2nd International Conference on Concurrency Theory
FORWARD AND BACKWARD SIMULATIONS PART II: TIMING-BASED SYSTEMS
FORWARD AND BACKWARD SIMULATIONS PART II: TIMING-BASED SYSTEMS
State Minimization of Incompletely Specified Sequential Machines
IEEE Transactions on Computers
Reducing the state space of incompletely specified timed Moore machines
SpringSim '10 Proceedings of the 2010 Spring Simulation Multiconference
From sequential machines to DEVS formalism
SCSC '09 Proceedings of the 2009 Summer Computer Simulation Conference
Proceedings of the 2012 Symposium on Theory of Modeling and Simulation - DEVS Integrative M&S Symposium
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In this paper, after the definition of incompletely specified Timed Sequential Machines (ISTSM), we present a method to reduce the number of states of this sub-class class of Timed Sequential Machines. For this purpose, we define the relations of coverage and compatibility between two states of an ISTSM, and we show how these relations can be used to reduce the number of states of an ISTSM.