Theoretical Computer Science
Symbolic model checking for real-time systems
Information and Computation
Event-clock automata: a determinizable class of timed automata
Theoretical Computer Science
The time and state relationships in simulation modeling
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GDEVS: A generalized discrete event specification for accurate modeling of dynamic systems
Transactions of the Society for Computer Simulation International
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Theory of Modelling and Simulation
Theory of Modeling and Simulation
Theory of Modeling and Simulation
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ANSS '04 Proceedings of the 37th annual symposium on Simulation
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Proceedings of the 2011 Symposium on Theory of Modeling & Simulation: DEVS Integrative M&S Symposium
Proceedings of the 2011 Symposium on Theory of Modeling & Simulation: DEVS Integrative M&S Symposium
Proceedings of the 2012 Symposium on Theory of Modeling and Simulation - DEVS Integrative M&S Symposium
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In this paper, we propose a hierarchy of discrete event formalisms beginning with an untimed formalism and ending with the most expressive of them: the DEVS formalism. This hierarchy is intended to facilitate the specification of models in a design process or to allow a progressive analysis of real systems to be easily done.