Nanoscale Application Specific Integrated Circuits

  • Authors:
  • Pritish Narayanan;Jorge Kina;Pavan Panchapakeshan;Priyamvada Vijayakumar;Kyeong-Sik Shin;Mostafizur Rahman;Michael Leuchtenburg;Israel Koren;Chi On Chui;Csaba Andras Moritz

  • Affiliations:
  • University of Massachusetts Amherst, USA;University of California Los Angeles, USA;University of Massachusetts Amherst, USA;University of Massachusetts Amherst, USA;University of California Los Angeles, USA;University of Massachusetts Amherst, USA;University of Massachusetts Amherst, USA;University of Massachusetts Amherst, USA;University of California Los Angeles, USA;University of Massachusetts Amherst, USA

  • Venue:
  • NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
  • Year:
  • 2011

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Abstract

This fabric update summarizes recent advances for the Nanoscale Application Specific Integrated Circuits (NASICs) nanoscale computing fabric. We provide a brief overview of NASICs, and discuss recent work at all fabric levels. We present advances in device design and optimization including omega gated and junctionless nanowire field effect transistors, methodologies for validation of functionality and parameter variation evaluation, new circuit-level sequencing schemes and performance optimization techniques. We also discuss techniques for defect and parameter variation resilience, ongoing fabrication directions including prototyping and scalable assembly efforts, and directions for the future.