New low-power tristate circuits in positive feedback source-coupled logic

Authors:
Kirti Gupta;Ranjana Sridhar;Jaya Chaudhary;Neeta Pandey;Maneesha Gupta
Affiliations:
Electronics and Communication Department, Delhi Technological University, New Delhi, India;Electronics and Communication Department, Delhi Technological University, New Delhi, India;Electronics and Communication Department, Delhi Technological University, New Delhi, India;Electronics and Communication Department, Delhi Technological University, New Delhi, India;Electronics and Communication Division, Netaji Subhas Institute of Technology, New Delhi, India
Venue:
Journal of Electrical and Computer Engineering
Year:
2011

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Abstract

Two new design techniques to implement tristate circuits in positive feedback source-coupled logic (PFSCL) have been proposed. The first one is a switch-based technique while the second is based on the concept of sleep transistor. Different tristate circuits based on both techniques have been developed and simulated using 0.18 µm CMOS technology parameters. A performance comparison indicates that the tristate PFSCL circuits based on sleep transistor technique are more power efficient and achieve the lowest power delay product in comparison to CMOS-based and the switch-based PFSCL circuits.