An approach for code compression in run time for embedded systems: a preliminary results

  • Authors:
  • Wanderson Roger Azevedo Dias;Edward David Moreno;Raimundo da Silva Barreto

  • Affiliations:
  • Federal University of Amazonas, Department of Computer Science, Manaus, Amazonas, Brazil;Federal University of Sergipe, Department of Computer Science, Aracaju, Sergipe, Brazil;Federal University of Amazonas, Department of Computer Science, Manaus, Amazonas, Brazil

  • Venue:
  • ICA3PP'11 Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part I
  • Year:
  • 2011

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Abstract

Several factors are considered in the development of embedded systems, among which may be mentioned: physical size, weight, mobility, power consumption, memory, safety, all combined with a low cost and ease of use. There are several techniques to optimize the execution time and power consumption in embedded systems. One such technique is the code compression, the majority of existing proposals focuses on decompression assuming the code is compressed in time compilation. This article proposes the development of a new method of compression and decompression code implemented in VHDL and prototyped on an FPGA, called MIC (Middle Instruction Compression). The proposed method was compared with the traditional of Huffman method also implemented in hardware. The MIC showed better performance compared with Huffman for some programs MiBench, widely used in embedded systems, obtaining 17% to less of the logical elements of FPGA, 6% increase in clock frequency (in MHz) and 42% more in compression codes compared the of using Huffman method, and allows the compression and decompression at runtime.