Limits to parallel computation: P-completeness theory
Limits to parallel computation: P-completeness theory
All-du-path coverage for parallel programs
Proceedings of the 1998 ACM SIGSOFT international symposium on Software testing and analysis
Introduction to Algorithms: A Creative Approach
Introduction to Algorithms: A Creative Approach
Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
Implicit heterogeneous and parallel programming
ACM SIGSOFT Software Engineering Notes
Computer
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Graphical Processing Units (GPUs) have recently been used to enable parallel application development. The most prominent initiative has been provided by NVIDIA™ with the so-called CUDA™ architecture, designed to GeForce™ graphic cards. However, even with CUDA C-like programming language, parallel codification remains somewhat awkward if compared to sequential codification. The programmer still has to deal with low-level hardware details such as generation and synchronization of threads and GPU tracks and sectors. In this paper, we propose a programmer-friendly interface for CUDA-C programming, in such a way that most hardware details are hidden from the programmer. We show how code readability is improved without undermining parallel execution performance.