Robust interfaces for mixed-timing systems with application to latency-insensitive protocols
Proceedings of the 38th annual Design Automation Conference
Coping with Latency in SOC Design
IEEE Micro
Synchronous Interlocked Pipelines
ASYNC '02 Proceedings of the 8th International Symposium on Asynchronus Circuits and Systems
A Novel Technique Towards Eliminating the Global Clock in VLSI Circuits
VLSID '04 Proceedings of the 17th International Conference on VLSI Design
Theory of latency-insensitive design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Synchronous elastic circuits (also known as latency-insensitive and latency-tolerant) behave independently of the latencies of computations and communication channels.