ACM Transactions on Computer Systems (TOCS)
Toward real-time performance benchmarks for Ada
Communications of the ACM
Cache performance of operating system and multiprogramming workloads
ACM Transactions on Computer Systems (TOCS)
IEEE Transactions on Computers - Special issue on architectural support for programming languages and operating systems
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
The interaction of architecture and operating system design
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
MIPS RISC architectures
A simulation based study of TLB performance
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Tradeoffs in supporting two page sizes
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Architectural support for translation table management in large address space machines
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Performance of the VAX-11/780 translation buffer: simulation and measurement
ACM Transactions on Computer Systems (TOCS)
Translation buffer performance in a UNIX enviroment
ACM SIGARCH Computer Architecture News
MC88200 Cache-Memory Management Unit User's Manual
MC88200 Cache-Memory Management Unit User's Manual
Microprocessor Memory Management Units
IEEE Micro
Data Movement in Kernelized Systems
Proceedings of the Workshop on Micro-kernels and Other Kernel Architectures
Performance of a Software MPEG Video Decoder
Performance of a Software MPEG Video Decoder
Trap-driven simulation with Tapeworm II
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
A new page table for 64-bit address spaces
SOSP '95 Proceedings of the fifteenth ACM symposium on Operating systems principles
The influence of caches on the performance of heaps
Journal of Experimental Algorithmics (JEA)
Proceedings of the 31st conference on Winter simulation: Simulation---a bridge to the future - Volume 2
SH3: High Code Density, Low Power
IEEE Micro
Access Control Mechanisms in a Distributed, Persistent Memory System
IEEE Transactions on Parallel and Distributed Systems
Lazy TLB Consistency for Large-Scale Multiprocessors
PAS '97 Proceedings of the 2nd AIZU International Symposium on Parallel Algorithms / Architecture Synthesis
Practical, transparent operating system support for superpages
ACM SIGOPS Operating Systems Review - OSDI '02: Proceedings of the 5th symposium on Operating systems design and implementation
Practical, transparent operating system support for superpages
OSDI '02 Proceedings of the 5th symposium on Operating systems design and implementationCopyright restrictions prevent ACM from being able to make the PDFs for this conference available for downloading
Segment protection for embedded systems using run-time checks
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
MTSS: multi task stack sharing for embedded systems
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
Deconstructing process isolation
Proceedings of the 2006 workshop on Memory system performance and correctness
Implementing virtual memory in a vector processor with software restart markers
Proceedings of the 20th annual international conference on Supercomputing
Memory overflow protection for embedded systems using run-time checks, reuse, and compression
ACM Transactions on Embedded Computing Systems (TECS)
Synergistic TLBs for High Performance Address Translation in Chip Multiprocessors
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
Hi-index | 0.00 |
An increasing number of architectures provide virtual memory support through software-managed TLBs. However, software management can impose considerable penalties that are highly dependent on the operating system's structure and its use of virtual memory. This work explores software-managed TLB design tradeoffs and their interaction with a range of monolithic and microkernel operating systems. Through hardware monitoring and simulation, we explore TLB performance for benchmarks running on a MIPS R2000-based workstation running Ultrix, OSF/1, and three versions of Mach 3.0.