Low-cost fault-tolerant switch allocator for network-on-chip routers

Authors:
Giorgos Dimitrakopoulos;Emmanouil Kalligeros
Affiliations:
University of West Macedonia, Karamanli & Ligeris, Kozani, Greece;University of the Aegean, Karlovassi, Samos, Greece
Venue:
Proceedings of the 2012 Interconnection Network Architecture: On-Chip, Multi-Chip Workshop
Year:
2012

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Abstract

Reliable operation that can be checked on-line is of paramount importance to current and future systems-on-chips that are implemented in very deep submicron technologies. In such systems, the communication among architectural modules is handled by a modular network-on-chip infrastructure that should be sufficiently protected from transient faults that may affect its correct operation. The error protection mechanism should cover all fault scenarios and incur the minimum area/energy/delay overhead. In this paper, we propose such an on-line checking mechanism for the switch allocator of the router that detects every possible single transient or permanent fault in the arbiters and handles it appropriately, thus preserving the reliable operation of the switch.