Automatic sizing of power/ground (P/G) networks in VLSI
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A static pattern-independent technique for power grid voltage integrity verification
Proceedings of the 40th annual Design Automation Conference
Fast vectorless power grid verification using an approximate inverse technique
Proceedings of the 46th Annual Design Automation Conference
A multigrid-like technique for power grid analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Power grid correction using sensitivity analysis under an RC model
Proceedings of the 48th Design Automation Conference
| Hi-index | 0.00 |
Power grid voltage integrity verification requires one to check if all the voltage drops on the grid are less than a certain threshold. This paper addresses the problem of correcting the grid when some voltage drops exceed this threshold, by making minor modifications to the existing design. The method uses current constraints that capture the uncertainty about the underlying circuit behavior to find the maximum voltage drop on the grid, and then to estimate the voltage drop as a function of the metal widths on the grid. It formulates a non-linear optimization problem and finds the required change in widths that reduces the maximum voltage drop below the threshold while keeping the total area cost at a minimum.