Parallel performance of hierarchical multipole algorithms for inductance extraction

Authors:
Hemant Mahawar;Vivek Sarin;Ananth Grama
Affiliations:
Department of Computer Science, Texas A&M University, College Station, TX;Department of Computer Science, Texas A&M University, College Station, TX;Department of Computer Science, Purdue University, West Lafayette, IN
Venue:
HiPC'04 Proceedings of the 11th international conference on High Performance Computing
Year:
2004

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Abstract

Parasitic extraction techniques are used to estimate signal delay in VLSI chips Inductance extraction is a critical component of the parasitic extraction process in which on-chip inductive effects are estimated with high accuracy In earlier work [1], we described a parallel software package for inductance extraction called ParIS, which uses a novel preconditioned iterative method to solve the dense, complex linear system of equations arising in these problems The most computationally challenging task in ParIS involves computing dense matrix-vector products efficiently via hierarchical multipole-based approximation techniques This paper presents a comparative study of two such techniques: a hierarchical algorithm called Hierarchical Multipole Method (HMM) and the well-known Fast Multipole Method (FMM) We investigate the performance of parallel MPI-based implementations of these algorithms on a Linux cluster We analyze the impact of various algorithmic parameters and identify regimes where HMM is expected to outperform FMM on uniprocessor as well as multiprocessor platforms.