Specifying the Caltech asynchronous microprocessor
Science of Computer Programming - Special issue on mathematics of program construction
Microprocessor Architectures: From VLIW to Tta
Microprocessor Architectures: From VLIW to Tta
A Discipline of Programming
Refinement Calculus: A Systematic Introduction
Refinement Calculus: A Systematic Introduction
Specification and Verification of Synchronous Hardware using LOTOS
FORTE XII / PSTV XIX '99 Proceedings of the IFIP TC6 WG6.1 Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols (FORTE XII) and Protocol Specification, Testing and Verification (PSTV XIX)
Trace Refinement of Action Systems
CONCUR '94 Proceedings of the Concurrency Theory
From Action Systems to Modular Systems
FME '94 Proceedings of the Second International Symposium of Formal Methods Europe on Industrial Benefit of Formal Methods
Action Systems in Pipelined Processor Design
ASYNC '97 Proceedings of the 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems
RAPPID: An Asynchronous Instruction Length Decoder
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Decentralization of process nets with centralized control
PODC '83 Proceedings of the second annual ACM symposium on Principles of distributed computing
Move Architecture in Digital Controllers
IEEE Transactions on Computers
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To ensure the correctness of functional and temporal properties of modern network hardware devices is becoming increasingly challenging because the growing complexity and demanding time-to-market requirements. In this paper we address the problem by deriving a TACO protocol processor model in the formal framework of Timed Action Systems. Formal methods offer a prominent approach to specify, design, and verify such devices with the benefits of a rigorous mathematical basis. The derivation demonstrates the capability of preserving correctness when considering an important hardware design decision.