Are multiport memories physically feasible?

Authors:
Martti J. Forsell
Affiliations:
Department of Computer Science, University of Joensuu, PB 111, SF-80101 Joensuu, Finland
Venue:
ACM SIGARCH Computer Architecture News - Special issue on input/output in parallel computer systems
Year:
1994

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Abstract

Parallel Random Access Machine (PRAM) is a popular model for parallel computation that promises easy programmability and great parallel performance, but only if efficient shared main memories can be built. This won't be easy, because the complexity of shared memories leads to difficult technical problems. In this paper we consider the idea of true multiport memory that can be used as building block of efficient PRAM-style shared main memory. Two possible structures of multiport memory chips are presented. We will also give preliminary cost-effectivity and performance analysis of memory systems using proposed multiport RAMs. Results are encouraging: At least small size multiport memories look physically feasible. Also the power of PRAM model can be fully exploited by computer systems with multiport memories.