Circuit sizing and supply-voltage selection for low-power digital circuit design

Authors:
Milena Vratonjic;Bart R. Zeydel;Vojin G. Oklobdzija
Affiliations:
Department of Electrical and Computer Engineering, University of California, Davis, CA;Department of Electrical and Computer Engineering, University of California, Davis, CA;Department of Electrical and Computer Engineering, University of California, Davis, CA
Venue:
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Year:
2006

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Abstract

This paper analyzes energy minimization of digital circuits operating at supply voltages above threshold and in the sub-threshold region. Circuit sizing and supply-voltage selection are simultaneously analyzed to determine where the minimum energy solution occurs. In this work we address the effects of architectural modifications on the design choices in different regions of operation. Two new architectural parameters are introduced that can be used for fast design comparison in the low power region of operation.