Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
JouleTrack: a web based tool for software energy profiling
Proceedings of the 38th annual Design Automation Conference
Performance Comparison of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems
RTAS '02 Proceedings of the Eighth IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'02)
Voltage-Clock Scaling for Low Energy Consumption in Real-Time Embedded Systems
RTCSA '99 Proceedings of the Sixth International Conference on Real-Time Computing Systems and Applications
Formal Methods for Dynamic Power Management
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Dynamic voltage scaling for systemwide energy minimization in real-time embedded systems
Proceedings of the 2004 international symposium on Low power electronics and design
Performance Evaluation of a NoC-Based Design for MC-CDMA Telecommunications Using NS-2
RSP '05 Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping
Design of On-chip and Off-chip Interfaces for a GALS NoC Architecture
ASYNC '06 Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems
Leakage power analysis and reduction during behavioral synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Methods for power optimization in SOC-based data flow systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Considering the complexity of the future 4G telecommunication systems, power consumption management becomes a major challenge for the designers, particularly for base-band modem functionalities. System level low-power policies which optimize dynamically the consumption, achieve major power savings compared to low level optimisations (e.g gated clock or transistor optimisation). We present an innovative power modeling methodology of a 4G modem which allows to accurately qualify such low power solutions. Then, we show the energy savings attended by these power management methods considering silicium technology.