Proceedings of the 45th annual Design Automation Conference
Nonvolatile memristor memory: device characteristics and design implications
Proceedings of the 2009 International Conference on Computer-Aided Design
Low-power dual-element memristor based memory design
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Geometry variations analysis of TiO2 thin-film and spintronic memristors
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Relaxing non-volatility for fast and energy-efficient STT-RAM caches
HPCA '11 Proceedings of the 2011 IEEE 17th International Symposium on High Performance Computer Architecture
Processor caches with multi-level spin-transfer torque ram cells
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Hi-index | 0.00 |
In this article, we propose a data storage system with the emerging nonvolatile memory technologies used for the implantable electrocardiography (ECG) recorder. The proposed storage system can record the digitalized real-time ECG waveforms continuously inside the implantable device and export the stored data to external reader periodically to obtain a long-term backup. Spin transfer torque random access memory (STT-RAM) and spintronic memristor are selected as the storage elements for their nonvolatility, high density, high reliability, low power consumption, good scalability, and CMOS technology compatibility. The new read and write schemes of STT-RAM and spintronic memristors are presented and optimized to fit the specific application scenario. The tradeoffs among data accuracy, chip area, and read/write energy for the different technologies are thoroughly analyzed and compared. Our simulation results show the configuration with a data sampling rate (e.g., 128 Hz) and a quantization resolution (e.g., 12 bits) can record 18-hour real-time data within ~ 3.6-mm2 chip area when the data storage is built with single-level cell (SLC) STT-RAMs. Daily energy consumption is 5.46 mJ. Utilizing the multilevel cell (MLC) STT-RAMs or the spintronic memristors as the storage elements can further reduce the chip area and decrease energy dissipation.