Genetic programming: on the programming of computers by means of natural selection
Genetic programming: on the programming of computers by means of natural selection
SUIF: an infrastructure for research on parallelizing and optimizing compilers
ACM SIGPLAN Notices
Conflict modelling and instruction scheduling in code generation for in-house DSP cores
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Exploiting dual data-memory banks in digital signal processors
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Pointer analysis for multithreaded programs
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
A Representation for the Adaptive Generation of Simple Sequential Programs
Proceedings of the 1st International Conference on Genetic Algorithms
The Evolution of Customer Middleware Requirements
PDIS '94 Proceedings of the Third International Conference on Parallel and Distributed Information Systems
Lexicographic Parsimony Pressure
GECCO '02 Proceedings of the Genetic and Evolutionary Computation Conference
ACM SIGARCH Computer Architecture News
Meta optimization: improving compiler heuristics with machine learning
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Automatic Tuning of Inlining Heuristics
SC '05 Proceedings of the 2005 ACM/IEEE conference on Supercomputing
Variable partitioning for dual memory bank DSPs
ICASSP '01 Proceedings of the Acoustics, Speech, and Signal Processing, 200. on IEEE International Conference - Volume 02
Fast source-level data assignment to dual memory banks
SCOPES '08 Proceedings of the 11th international workshop on Software & compilers for embedded systems
Genetic programming applied to compiler heuristic optimization
EuroGP'03 Proceedings of the 6th European conference on Genetic programming
Evaluating iterative compilation
LCPC'02 Proceedings of the 15th international conference on Languages and Compilers for Parallel Computing
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Dual memory banks provide extra memory bandwidth to DSP applications and enable simultaneous access to two operands if the data is partitioned appropriately. Fully automated and compiler integrated approaches to data partitioning and memory bank assignment have, however, found little acceptance by DSP software developers. In this article we present a novel source-level approach that is more programmer friendly. Our scheme is based on soft graph coloring and highly adaptive heuristics generated by genetic programming. We have evaluated our scheme on an Analog Devices TigerSHARC TS-101 DSP and achieved speedups of up to 57% on 13 UTDSP benchmarks.