The complementation problem for Bu¨chi automata with applications to temporal logic
Theoretical Computer Science
On the synthesis of a reactive module
POPL '89 Proceedings of the 16th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Reasoning about infinite computations
Information and Computation
Model checking
Automata on Infinite Objects and Church's Problem
Automata on Infinite Objects and Church's Problem
On the Synthesis of an Asynchronous Reactive Module
ICALP '89 Proceedings of the 16th International Colloquium on Automata, Languages and Programming
An Automata-Theoretic Approach to Fair Realizability and Synthesis
Proceedings of the 7th International Conference on Computer Aided Verification
FOCS '05 Proceedings of the 46th Annual IEEE Symposium on Foundations of Computer Science
Faster Solutions of Rabin and Streett Games
LICS '06 Proceedings of the 21st Annual IEEE Symposium on Logic in Computer Science
Interactive presentation: Automatic hardware synthesis from specifications: a case study
Proceedings of the conference on Design, automation and test in Europe
On the Merits of Temporal Testers
25 Years of Model Checking
Compositional Synthesis of Reactive Systems from Live Sequence Chart Specifications
TACAS '09 Proceedings of the 15th International Conference on Tools and Algorithms for the Construction and Analysis of Systems: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009,
Controller Synthesis from LSC Requirements
FASE '09 Proceedings of the 12th International Conference on Fundamental Approaches to Software Engineering: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009
Synthesis of programs from temporal property specifications
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
Receding horizon control for temporal logic specifications
Proceedings of the 13th ACM international conference on Hybrid systems: computation and control
Synthesis of asynchronous systems
LOPSTR'06 Proceedings of the 16th international conference on Logic-based program synthesis and transformation
Synthesis of live behaviour models for fallible domains
Proceedings of the 33rd International Conference on Software Engineering
Solving games without determinization
CSL'06 Proceedings of the 20th international conference on Computer Science Logic
JTLV: a framework for developing verification algorithms
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Synthesis of reactive(1) designs
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
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We consider automatic synthesis from linear temporal logic specifications for asynchronous systems. We aim the produced reactive systems to be used as software in a multi-threaded environment. We extend previous reduction of asynchronous synthesis to synchronous synthesis to the setting of multiple input and multiple output variables. Much like synthesis for synchronous designs, this solution is not practical as it requires determinization of automata on infinite words and solution of complicated games. We follow advances in synthesis of synchronous designs, which restrict the handled specifications but achieve scalability and efficiency. We propose a heuristic that, in some cases, maintains scalability for asynchronous synthesis. Our heuristic can prove that specifications are realizable and extract designs. This is done by a reduction to synchronous synthesis that is inspired by the theoretical reduction.