Soft error reduction in combinational logic using gate resizing and flipflop selection
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Designing Nanoscale Logic Circuits Based on Markov Random Fields
Journal of Electronic Testing: Theory and Applications
A 160 mV, fully differential, robust schmitt trigger based sub-threshold SRAM
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
A cost effective approach for online error detection using invariant relationships
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Review: New redundant logic design concept for high noise and low voltage scenarios
Microelectronics Journal
Simulation of random telegraph noise with 2-stage equivalent circuit
Proceedings of the International Conference on Computer-Aided Design
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Nanoscale circuits operating at sub-threshold voltages are affected by growing impact of random telegraph signal (RTS) and thermal noise. Given the low operational voltages and subsequently lower noise margins, these noise phenomena are capable of changing the value of some of the nodes in the circuit, compromising the reliability of the computation. We propose a method for improving noise-tolerance by selectively applying feed-forward reinforcement to circuits based on use of existing invariant relationships. As reinforcement mechanism, we used a modification of the standard CMOS gates based on the Schmitt trigger circuit. SPICE simulations show our solution offers better noise immunity than both standard CMOS and fully reinforced circuits, with limited area and power overhead.