Improving testbench evaluation using normalized formal properties

Authors:
Martin Oberkönig;Martin Schickel;Hans Eveking
Affiliations:
Technische Universität Darmstadt, Computer Systems Group, Darmstadt, Germany;Technische Universität Darmstadt, Computer Systems Group, Darmstadt, Germany;Technische Universität Darmstadt, Computer Systems Group, Darmstadt, Germany
Venue:
VECoS'09 Proceedings of the Third international conference on Verification and Evaluation of Computer and Communication Systems
Year:
2009

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Abstract

In this paper, we present a method to improve the testbench evaluation in a simulative verification process using formal properties. Assuming that at least for some part(s) of the design under test (DUT) a set of formal properties exists, the properties are transformed into a normalized form. The transformed properties, called microproperties, allow an objective evaluation of the testbench of the full DUT. It is possible to obtain more detailed coverage results using microproperties than by means of the original properties. This paper also describes how to obtain a unified metric from formal and non-formal verification results. Several examples including an AMBA AHB bus system are used to show the presented technique's practical applications.