Technical Communique: Getting more phase margin and performance out of PID controllers

  • Authors:

  • W. K. Ho;K. W. Lim;C. C. Hang;L. Y. Ni

  • Affiliations:

  • Department of Electrical Engineering, National University of Singapore, 10 Kent Ridge Crescent, Singapore 119260, Singapore;Department of Electrical Engineering, National University of Singapore, 10 Kent Ridge Crescent, Singapore 119260, Singapore;Department of Electrical Engineering, National University of Singapore, 10 Kent Ridge Crescent, Singapore 119260, Singapore;Department of Electrical Engineering, National University of Singapore, 10 Kent Ridge Crescent, Singapore 119260, Singapore

  • Venue:
  • Automatica (Journal of IFAC)
  • Year:
  • 1999

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Abstract

Designing a PID controller to meet gain and phase margin specification is a well-known design technique. If the gain and phase margin are not specified carefully then the design may not be optimum in the sense that there could be larger phase margin (more robust) that could give better performance. This paper studies the relationship between the integral square error performance index, gain margin, phase margin and gives recommendation for gain and phase margin specification to get more phase margin and performance out of PID controllers.