A new addition scheme and fast scaling factor compensation methods for CORDIC algorithms
Integration, the VLSI Journal
Elementary functions: algorithms and implementation
Elementary functions: algorithms and implementation
The Electronic Numerical Integrator and Computer (ENIAC)
IEEE Annals of the History of Computing
CORDIC Architectures with Parallel Compensation of the Scale Factor
ASAP '95 Proceedings of the IEEE International Conference on Application Specific Array Processors
Decimal Floating-Point: Algorism for Computers
ARITH '03 Proceedings of the 16th IEEE Symposium on Computer Arithmetic (ARITH-16'03)
Decimal floating-point in z9: an implementation and testing perspective
IBM Journal of Research and Development
A Cordic Arithmetic Processor Chip
IEEE Transactions on Computers
Fourier Transform Computers Using CORDIC Iterations
IEEE Transactions on Computers
A unified algorithm for elementary functions
AFIPS '71 (Spring) Proceedings of the May 18-20, 1971, spring joint computer conference
Decimal floating-point support on the IBM system z10 processor
IBM Journal of Research and Development
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Since radix-10 arithmetic has been gaining renewed importance over the last few years, high performance decimal systems and techniques are highly demanded. In this paper, a modification of the CORDIC method for decimal arithmetic is proposed so as to improve calculations. The algorithm works with BCD operands and no conversion to binary is needed. A significant reduction in the number of iterations in comparison to the original decimal CORDIC method is achieved. The experiments showing the advantages of the new method are described. Also, the results with regard to delay obtained by means of an FPGA implementation of the method are shown.