Overview of gate linewidth control in the manufacture of CMOS logic chips

Authors:
D. G. Chesebro;J. W. Adkisson;L. R. Clark;S. N. Eslinger;M. A. Faucher;S. J. Holmes;R. P. Mallette;E. J. Nowak;E. W. Sengle;S. H. Voldman;T. W. Weeks
Affiliations:
-;-;-;-;-;-;-;-;-;-;-
Venue:
IBM Journal of Research and Development - Special issue: IBM CMOS technology
Year:
1995

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Abstract