On Boosting the Accuracy of Non-RF to RF Correlation-Based Specification Test Compaction
Journal of Electronic Testing: Theory and Applications
Hierarchical parametric test metrics estimation: a ΣΔ converter BIST case study
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Defect-based test optimization for analog/RF circuits for near-zero DPPM applications
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Fault diagnosis of analog circuits based on machine learning
Proceedings of the Conference on Design, Automation and Test in Europe
Enrichment of limited training sets in machine-learning-based analog/RF test
Proceedings of the Conference on Design, Automation and Test in Europe
RF specification test compaction using learning machines
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Spatial correlation modeling for probe test cost reduction in RF devices
Proceedings of the International Conference on Computer-Aided Design
Handling discontinuous effects in modeling spatial correlation of wafer-level analog/RF tests
Proceedings of the Conference on Design, Automation and Test in Europe
Advances in variation-aware modeling, verification, and testing of analog ICs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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Machine-learning-based test methods for analog/RF devices have been the subject of intense investigation over the last decade. However, despite the significant cost benefits that these methods promise, they have seen a limited success in replacing the traditional specification testing, mainly due to the incurred test error which, albeit small, cannot meet industrial standards. To address this problem, we introduce a neural system that is trained not only to predict the pass/fail labels of devices based on a set of low-cost measurements, as aimed by the previous machine-learning-based test methods, but also to assess the confidence in this prediction. Devices for which this confidence is insufficient are then retested through the more expensive specification testing in order to reach an accurate test decision. Thus, this two-tier test approach sustains the high accuracy of specification testing while leveraging the low cost of machine-learning-based testing. In addition, by varying the desired level of confidence, it enables the exploration of the tradeoff between test cost and test accuracy and facilitates the development of cost-effective test plans. We discuss the structure and the training algorithm of an ontogenic neural network which is embodied in the neural system in the first tier, as well as the extraction of appropriate measurements such that only a small fraction of devices are funneled to the second tier. The proposed test-error-moderation method is demonstrated on a switched-capacitor filter and an ultrahigh-frequency receiver front end.