Automated technique for design of NoC with minimal communication latency
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Statistical estimation and evaluation for communication mapping in Network-on-Chip
Integration, the VLSI Journal
Designing heterogeneous embedded network-on-chip platforms with users in mind
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
User-centric design space exploration for heterogeneous network-on-chip platforms
Proceedings of the Conference on Design, Automation and Test in Europe
A holistic approach to network-on-chip synthesis
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
3D network-on-chip architectures using homogeneous meshes and heterogeneous floorplans
International Journal of Reconfigurable Computing - Special issue on selected papers from ReconFig 2009 International conference on reconfigurable computing and FPGAs (ReconFig 2009)
A3MAP: Architecture-aware analytic mapping for networks-on-chip
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Research on half-mesh topology based on binary model and HTF-XY routing algorithm
International Journal of Computer Applications in Technology
| Hi-index | 0.03 |
This paper addresses the automated synthesis of a custom network-on-chip architecture whose topology is optimized for the specific communication requirements of the target device. The optimization objectives include power consumption and resource usage. This paper presents a two-stage synthesis approach consisting of the following: (1) core to router mapping and (2) custom topology and route generation. In particular, it presents an optimal technique for core to router mapping [stage (1)] and a factor-2 approximation algorithm for custom topology generation [stage (2)]. The superior quality of the techniques is established by experimentation with benchmark applications and by comparisons with existing approaches.