ISPD '99 Proceedings of the 1999 international symposium on Physical design
Crosstalk constrained global route embedding
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Reducing cross-coupling among interconnect wires in deep-submicron datapath design
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Crosstalk noise estimation for noise management
Proceedings of the 39th annual Design Automation Conference
Channel and Switchbox Routing with Minimized Crosstalk - A Parallel Genetic Algorithm Approach
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Layer assignment for crosstalk risk minimization
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Power-delay optimization in VLSI microprocessors by wire spacing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
On old and new routing problems
Proceedings of the 2011 international symposium on Physical design
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This paper proposes one-dimensional spacing algorithms that minimize [maximize] the degree of separation [proximity] among the specified elements of a given integrated circuit layout. Number of problems on chip and MCM systems such as poor performance, higher crosstalk, lower yield etc. are related to the degree of separation [proximity]. The proposed algorithms utilize the attractive [repulsive] constraints to shrink [expand] the distances among the specified elements while keeping the layout free of any design rule errors. The spacing problem is reduced to a parametric linear programming problem and a network simplex algorithm is proposed for solving it. The proposed algorithms are implemented into a system called PERFECT for performance enhancement and crosstalk reduction. Given a routed design, PERFECT minimizes delay due to the coupled capacitance, which could contribute as much as 50-75% to the interconnect delay in near future. PERFECT utilizes the repulsive constraints between interconnect segments for the purpose. The experimental results show a significant delay improvement and the crosstalk reduction for submicron technologies