Gauss: a simple high performance switch architecture for ATM
SIGCOMM '90 Proceedings of the ACM symposium on Communications architectures & protocols
Fast and noniterative scheduling in input-queued switches: Supporting QoS
Computer Communications
Proposed high speed packet switch for broadband integrated networks
Computer Communications
Research: MS4 - a high performance output buffering ATM switch
Computer Communications
Research: Modular multicast ATM switching architecture
Computer Communications
Research: Performance of dilated banyan network with back-pressure mechanism
Computer Communications
Research: Analysis and design of Banyan and crossbar switches with bypass queues
Computer Communications
Review: High performance copy network design for multicast ATM switching
Computer Communications
Circular window control schemes in fast packet switches
Computer Communications
Research: Design and performance analysis of crossbar ATM switching architecture
Computer Communications
Fast knockout algorithm for self-route concentration
Computer Communications
Performance analysis of efficient multipath crossbars
Computer Communications
Two-dimensional shared memory multicast ATM switching architecture
Computer Communications
Impact of ATM switch architectures on CBR video performance
Computer Communications
Study of temporal behaviour of packet loss in packet switches with bursty traffic arrivals
Computer Communications
Design issues for multicast ATM switches
Computer Communications
Review: Review of recent shared memory based ATM switches
Computer Communications
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A new, high-performance packet-switching architecture, called the Knockout Switch, is proposed. The Knockout Switch uses a fully interconnected switch fabric topology (i.e., each input has a direct path to every output) so that no switch blocking occurs where packets destined for one output interfere with (i.e., block or delay) packets going to different Outputs. It is only at each output of the switch that one encounters the unavoidable congestion caused by multiple packets simultaneously arriving on different inputs all destined for the same output. Taking advantage of the inevitability of lost packets in a packet-switching network, the Knockout Switch uses a novel concentrator design at each output to reduce the number of separate buffers needed to receive simultaneously arriving packets. Following the concentrator, a shared buffer architecture provides complete sharing of all buffer memory at each output and ensures that all packets are placed on the output line on a first-in first-out basis. The Knockout Switch architecture has low latency, and is self-routing and nonblocking. Moreover, its Simple interconnection topology allows for easy modular growth along with minimal disruption and easy repair for any fault. Possible applications include interconnects for multiprocessing systems, high-speed local and metropolitan area networks, and local or toll switches for integrated traffic loads.